The present invention relates to a circuit for driving a liquid crystal display (LCD), which comprises a circuit for discharging an LCD-driving voltage. More particularly, the invention relates to a circuit that discharges an accumulated LCD-driving voltage when the power supply to the circuit is interrupted, thereby to prevent flickering on the screen of the liquid crystal display (LCD).
Personal apparatus developed in recent years, such as mobile telephones, are characterized in some respects. First, they are driven by a chargeable battery. Second, they have a liquid crystal display (LCD). Third, they consume less and less electric power. A circuit for driving an LCD is known which comprises an LCD drive circuit and an LCD power-supply circuit, both consumes a little electric power. This circuit will be described below.
FIG. 19 is a circuit diagram of a conventional circuit for driving a liquid crystal display.
As shown in FIG. 19, a booster circuit raises the voltage (VDD) of a signal for turning on and off a liquid crystal display LCD, converting the signal to one having an LCD-driving voltage (VLCD). The signal having the LCD-driving voltage is input to an LCD drive buffer. The buffer outputs an LCD-driving voltage or a reference voltage GND.
In the LSI incorporating this circuit for driving a liquid crystal display, a power-supply voltage VDD is applied from a power supply 100. The booster circuit 102 raises the power-supply voltage VDD, thus generating an LCD-driving voltage VLCD. The voltage VLCD is accumulated in a capacitor C100 provided for holding a voltage.
An SC signal is supplied to the circuit from an external device. The SC signal is a control signal having a VDD voltage, for turning on or off the liquid crystal display LCD. The signal SC becomes effective when a DISPOFF signal (later described) is set at low level (GND). The DISPOFF signal is used to turn off the liquid crystal display LCD, whichever level the SC signal has. To turn off the liquid crystal display LCD, the DISPOFF signal is set at high level (VDD). Both the SC signal and the DISPOFF signal are input to an OR gate circuit 104. The OR gate circuit 104 outputs the logic sum of these signals, or a signal IN. The signal IN is input to a level shifter 106.
The level shifter 106 changes the level of the signal IN, from the VDD level to the VLCD level, thereby generating a positive signal OUT. The signal OUT is input to the LCD drive buffer 108. The LCD drive buffer 108, which comprises a p-channel MOS transistor MP100 and an n-channel MOS transistor MN100, outputs a drive signal S100. The drive signal S100 has the LCD-driving voltage VLCD when the signal OUT is at the GND level, and has the reference voltage GND when the signal OUT is at the VLCD level. The drive signal S100 is input to the liquid crystal display LCD.
Namely, in order to drive the liquid crystal display LCD, a DISOFF signal at low level is input, thus validating the SC signal, and a drive signal S100 generated from the SC signal is output. On the other hand, to turn off the liquid crystal display LCD, a DISOFF signal at high level is input, thus invalidating the SC signal, and a drive signal S100 at GND level is output.
The OR gate circuit 104, level shifter 106 and LCD drive buffer 108 constitute a circuit which outputs a drive signal S100. A plurality of circuits of this type are provided in the LSI on which the circuit of FIG. 19 is mounted. It is assumed here that the power-supply voltage VDD is 1.5V, and that the booster circuit 102 raises the power-supply voltage to 4.5V, i.e., three times the voltage VDD (=VDD.times.3). The voltage of 4.5V, thus generated, is used as the LCD-driving voltage VLCD. The circuit of FIG. 19, thus constructed, shall be hereinafter referred to as "conventional circuit 1."
Another conventional circuit for driving a liquid crystal display will be described below.
FIG. 20 is a block diagram illustrating a circuit for driving a liquid crystal display, which incorporates an LCD drive circuit and an LCD power-supply circuit.
The circuit for driving a liquid crystal display is mounted on a large-scale integrated circuit (LSI) 50. As shown in FIG. 20, the LSI 50 has an LCD drive circuit 52 and an LCD power-supply circuit 54. The circuit 52 outputs a display signal to a liquid crystal display LCD. The circuit 54 generates an LCD-driving voltage VLCD and applies the same to the LCD drive circuit 52.
The LCD power-supply circuit 54 is a booster circuit whose output contains no DC pulses and which consumes but a little power. Capacitors C110, C111 and C112 are arranged outside the LSI 50. The capacitors accumulate electric charge to provide an increased current capacity.
In the LSI 50 having the above-described circuit for driving the LCD, a power-supply voltage VDD generated by an external device is applied to the LCD power-supply circuit 54. The circuit 54 generates three voltages V1, V2 and V3 from the power-supply voltage VDD. The voltages V1, V2 and V3 are applied to the LCD drive circuit 52 and are also accumulated in the capacitors C110, C111 and C112, respectively. The power-supply voltage VDD is 5V, and the voltages V1, V2 and V3 are 1V, 2V and 3V, respectively. The circuit of FIG. 20, thus constructed, shall be hereinafter referred to as "conventional circuit 2."
With small communications apparatus, such as a PHS (Personal Handyphone System) and a mobile telephone, it is necessary to reduce power consumption. To this end, power supply to the LSI incorporating the above-described LCD-driving circuit must be interrupted to save power. With such small communications apparatus it is necessary to replace the battery with a new one when the battery is used up. These apparatus are so designed that the battery can be replaced very easily. In many cases, the user may abruptly remove the battery from the apparatus.
How the conventional circuit 1 (FIG. 19) operates when the application of the voltage VDD is interrupted will be explained, with reference to FIGS. 3, 4, 21 and 22.
FIG. 21 is a circuit diagram of the level shifter 106. The level shifter is of the ordinary type. It comprises p-channel MOS transistors MP101 to MP105 and n-channel transistors MN101 to MN105. As mentioned above, the LCD-driving voltage VLCD is 4.5V.
The level shifter 106 operates in one way when the power-supply voltage VDD ranges from 0.5 to 1.5V, and in another way when the voltage VDD is less than 0.5V.
When the power-supply voltage VDD applied from the power supply 100 is 0.5 to 1.5V, the signal IN input to the level shifter 106 and the signal OUT output therefrom have the relation shown in FIG. 3. In this case, the level shifter 106 operates normally.
When the power-supply voltage VDD is less than the lowest operating voltage VDDmin of 0.5V, the voltage on the output lines a and b of the inverter composed of the transistors MP101, MN101, MP102 and MN102 becomes indefinite. Consequently, the transistors MN103 and MN104 have an indefinite gate bias voltage (less than 0.5V) and an extremely high on-resistance. This renders the voltage on the line C indefinite. A current inevitably passes through the path between the transistor MN105 and the transistor MP105.
As a consequence, the signal OUT output from the level shifter 106 comes to have an indefinite value, too. At this time, the signal IN an the signal Out have the relation shown in FIG. 4. As can be understood from FIG. 4, the signal OUT is always indefinite.
Hence, when the power-supply voltage VDD falls below 0.5V, i.e. the lowest operating voltage VDDmin of the level shifter 106, in the conventional LCD-driving circuit, the signal OUT, i.e. the output of the level shifter 106, becomes indefinite. If so, the gate biases of the transistors MN100 and MP100 become indefinite.
As a consequence, a current passes through the path between the transistors MN100 and MP100, and the drive signal S100 output from the LCD drive buffer 108 becomes indefinite (about 2 to 3V), failing to acquire the ground level (0V). A voltage is inevitably applied to the liquid crystal display LCD. As a result, an undesired phenomenon, such as flickering, will take place on the screen of the display LCD.
FIG. 22 illustrates how the voltages VLCD and VDD change when the application of the power-supply voltage VDD is interrupted after the liquid crystal display LCD has been turned off (that is, after the booster circuit 102 has been turned off). As seen from FIG. 22, the voltage VDD falls along a steep slope to a value near the GND level (0V) after the application of the power-supply voltage VDD has been interrupted. By contrast, the voltage VLCD falls along a gentle slope toward the GND level since the capacitor C100 holds the voltage VLCD.
Therefore, a current passes through the path between the transistors MN100 and MP100 for a period tA, whereby a voltage is applied to the liquid crystal display LCD, by virtue of the drive signal S100. Since the electric charge is fast dissipated from the capacitor C100 for a certain period, the slope of the LCD-driving voltage VLCD is steep for the period tA only. Generally, the liquid crystal is momentarily driven if a voltage is applied on it for the period tA as is illustrated in FIG. 22, whereby the liquid crystal display LCD is turned on (it displays data). The value of the voltage at which the display LCD is turned on depends on the type of the liquid crystal used in the display LCD.
How the conventional circuit 2 (FIG. 20) operates when the chargeable battery is removed, that is, when the application of the power-supply voltage VDD is interrupted, will be explained, with reference to FIG. 23.
FIG. 23 illustrates how the power-supply voltage VDD and the LCD-driving voltage VLCD change when the application of the power-supply voltage VDD is interrupted in the LSI 50.
When a chargeable battery is abruptly removed from, for example, a mobile telephone incorporating the LSI 50, the power-supply voltage VDD quickly falls to the reference voltage GND as is illustrated in FIG. 23.
At the same time, the LCD-driving voltages V1, V2 and V3, all generated in the LCD power-supply circuit 54, start falling. How much the voltages V1, V2 and V3 fall is determined by the leakage current, because the conventional circuit 2 has no DC path.
When the power-supply voltage VDD falls below the lowest operating voltage of the LSI 50, the components of the LSC 50 can no longer be controlled. The conventional circuit 2 inevitably makes errors. Nonetheless, no particular problem arises if the LCD-driving voltages V1, V2 and V3 have fallen to a very small value. If the voltages V1, V2 and V3 fall too slowly, however, a high DC voltage will be applied to the liquid crystal display LCD, momentarily turning on the same. Consequently, flickering occurs or a streak is displayed, on the screen of the liquid crystal display LCD.
As described above, the conventional LCD-driving circuits apply a LCD-driving voltage VLCD accumulated in the voltage-holding capacitors, to a liquid crystal display LCD, when the power-supply voltage VDD falls below the lowest operating voltage. The voltage VLCD thus applied causes undesirable phenomena, such as flickering, on the screen of the liquid crystal display LCD.